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[–] Spectro 1 points 36 points (+37|-1) ago 

There are better sources than The Verge.

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[–] brainbaobao 0 points 12 points (+12|-0) ago 

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[–] hexydes 0 points 8 points (+8|-0) ago 

I came here to say this. I'd leave them a comment about how to do a better job but...

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[–] director87 0 points 5 points (+5|-0) ago 

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[–] TheDefaultState 0 points 3 points (+3|-0) ago 

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[–] MagneticHammer 0 points 14 points (+14|-0) ago 

What did they do mitigate errors caused by electron jump?

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[–] intono 0 points 18 points (+18|-0) ago 

Electrons jump freely at about 4nm (I know that easily happens in organic molecules) with little stimulation, moreover don't forget the material's work function which tells how easily an electron can be removed from it. The only obstacle I noticed when building such devices was the electrode deposition quality which at around 10nm started to be difficult to control. This was in academic grade builds for simple transistors One should consider maybe IBM's proprietary architectures, materials, and build and testing conditions.

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[–] ChaoticNeutral 0 points 11 points (+11|-0) ago 

Atomic Layer Deposition makes sub 10 nm control straight forward once you have the masking down. Intel was at the ALD conference talking about 5 nm gates/electrodes.

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[–] Cpt_James 0 points 2 points (+2|-0) ago 

This is the information that I am really interested in too. With something so small why aren't they having a large amount of jumps? Maybe they have somehow integrated the carbon nanotubes designs with using SiGi transistors?

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[–] ChaoticNeutral 0 points 3 points (+3|-0) ago 

I saw an Intel presentation recently where they were talking about 5 nm structures. The use multiple gates and S/Ds stacked. Gives smaller structures but high performance. The tunneling is less of an issue when it would have to tunnel multiple times to cross a device.

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[–] RedSocks157 0 points 6 points (+6|-0) ago 

Not exciting. You know what would be exciting? Graphene. At this size the power issues will be immense with silicone.

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[–] SeanKPS 0 points 9 points (+9|-0) ago 

Graphene hit some limitations so they're working on other solutions including using graphene with something else, using something else entirely, and this silicon-germanium

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[–] RedSocks157 0 points 4 points (+4|-0) ago 

Interesting. Well maybe they should put their research there rather than wasting any more time shrinking silicon. The returns have been diminishing for so long now, at this stage it's basically more trouble than it's worth.

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[–] GeorgeMichael 0 points 1 points (+1|-0) ago 

or quantum processors for everyone, that would be awesome

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[–] wowultimation 0 points 0 points (+0|-0) ago 

Although quantum processors are crap for everyday usages.

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[–] Registered-Voater 0 points 3 points (+3|-0) ago 

Wow, this is absolutely stunning. I was worried paper wouldn't hit the silicon without some likely unscalable (at the moment) tech like carbon nanotubes.

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[–] WalkingShadow 0 points 4 points (+4|-0) ago 

a processor built at 7nm is expected to have twice the power density of one built at 10nm

That sounds like a serious problem.

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[–] Registered-Voater 0 points 4 points (+4|-0) ago 

I think that might just be sloppy writing on the author's part, the quoted section from IBM doesn't read like that..

IBM anticipates they'll offer "close to 50 percent area scaling improvements over today’s most advanced 10nm technology." In other words... [Insert innacurate rephrasing here]

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[–] ShartAttack 0 points 1 points (+1|-0) ago 

Smaller = less power requirements.

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[–] helloworld 0 points 2 points (+2|-0) ago 

Can someone who knows what they're talking about weigh in and let us know if this will actually be coming out in the near term? Or is it another 'ZOMG we doubled battery capacity!!!1!!!one!!!1' fluff piece?

[–] [deleted] 0 points 3 points (+3|-0) ago  (edited ago)

[Deleted]

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[–] goat_boat 0 points 0 points (+0|-0) ago  (edited ago)

The main hurdle is that it relies on extreme ultra violet light (13.5 nm) technology to pattern the wafers.

Certainly you mean 135nm? 13.5nm is close to X-ray. If it truly is 13.5nm then how can they do 10nm features with 193nm, but require a 13nm source for a 7nm feature?

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[–] Aplracer1 0 points 3 points (+3|-0) ago 

To be honest we wont see this in personal computing for at least five years. To put things into perspective Intel's Skylake generation of processors is using 14nm nodes and it took them years to get that small of a processor to work with manufacturing. The issue isn't designing one or two of these super small processor components, the issue is getting the manufacturing facilities to upgrade equipment and develop processes for mass market sale. These are very precise electronics and require even more precise machines which might (aren't) fully developed for large scale use yet.

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[–] helloworld 0 points 1 points (+1|-0) ago 

Thanks for the explanation.

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[–] EdwardAbbey 0 points 1 points (+1|-0) ago 

Is that a fairly standard delay - five years? As in, does mass manufacturing generally lag five years behind development in this industry? Or will it take an exceptional amount of time in this case?

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[–] immortalmewtwo 0 points 3 points (+3|-0) ago 

It's another 'ZOMG we X amount processor performance and size!!!1!!!one!!!1'

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[–] JDogg1329 0 points 1 points (+1|-0) ago 

This stuff melts my brain

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[–] Indiana_Jones 0 points 1 points (+1|-0) ago 

Things have changed so much since I had to steal that futuristic mircrochip from Dr. Zuse out of that german laboratory in Düsseldorf. It was allgedly from Atlantis and the US gave it to IBM in 1943. I think they're still not able to reproduce that little glowing thing though.

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[–] AZMatic 0 points 1 points (+1|-0) ago 

Not going to lie... When I saw the thumbnail photo I thought it was a dick and I still clicked it. Interesting post either way.

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