I was doing some calculations for my research and I needed more precision than afforded by the long float type
Using 'long double' on a x86 machine should give you access to 80 bit FP math (as supported by the x87 FPU instructions). Unfortunately x87 and SSE instructions are mutually exclusive (SSE instructions only support 64bit doubles) so there may be a performance hit (although 80bit x87math is still a heck of a lot faster than extended precision software implementations).
Highly unlikely. The number of address bits determines the maximum amount of RAM that can be accessed directly. 64 bits comfortably holds today's RAM addresses, and the number of addressable sectors on disk drives. So at the moment there's no pressure to go from 64 to 128 bits.
Still, who's to know the future? Wasn't there a guy once who said '640K of memory ought to be enough for anyone'.
[–] littul_kitton 1 point 0 points 1 point (+1|-1) ago
No. Only a few people need more than 64 bits, but many of those people need more than 128. Going to 128 bits would help very few people.
There is also the question of whether it would even help. The wider an operand becomes, the more time it takes to do the computation, especially for division. So you either have to slow down the clock rate, or you have to add a few stages to the pipeline. At that point the speed, power consumption, complexity are not much improvement over just using multiple 64-bit instructions.
So I predict that we have maxed out at 64/80-bit operands. But SIMD vector unit width seems to be increasing steadily. Current vector units top out at 512 bits, which packs in 8 64-bit operands. To work with wider data, you will use sequential 64-bit operations to handle the full precision, and run several of those in parallel in the 512-bit vector unit.
[–] CanIHazPhD [S] 0 points 1 point 1 point (+1|-0) ago (edited ago)
The wider an operand becomes, the more time it takes to do the computation
I was wondering if this would lead to a loss of performance, I don't think the switch from 32 to 64 leaded to an important lose of performance, but I'm not so sure about that.
The part that it wouldn't help many people it's quite true, though.
This is why the x32 ABI was created for Linux. https://en.wikipedia.org/wiki/X32_ABI
[–] littul_kitton ago
I suspect but cannot verify that the move from 32 to 64 did slow things down, but they deepened the pipeline for other reasons and it turned out to actually run in fewer cycles. (At least with respect to the first generation of 32-bit processors. Multiply used to be slow enough that you would manually bit shift when possible, and division was scary slow.)
[–] [deleted] 1 point 0 points 1 point (+1|-1) ago
[–] CanIHazPhD [S] ago
This was part of my reasoning, I figured the switch happened due to the need to address more storage/memory and that the extra precision was just a bonus.
[–] [deleted] 0 points 4 points 4 points (+4|-0) ago
[–] omegletrollz 0 points 2 points 2 points (+2|-0) ago (edited ago)
I've never heard it mentioned before and I think that if it was a real possibility some processor producers would have jumped into it already instead of allowing Moore's Law to be bent recently and most likely broken in the near future. I hear a lot more talk of quantum computers and I think there are already practical projects put in place. This is only my uninformed view but I guess if there is a breakthrough in quantum computing it will render 128-bit processors obsolete even before they become commercially available.
[–] freddybobs68k 0 points 1 point 1 point (+1|-0) ago
Depends what you mean by a 128-bit architecture. If you mean 128 bit addressing - seems unlikely in say the next 5 years. That said I remember as a computer science student have discussions of whether we'd ever need more than 32 bit addressing... which now seems sort of absurd now.
If the original question is will we have machines with 128 bit float types? For main stream usage probably not any time soon- the cost of supporting such a feature wouldn't be worth it for a main stream processor. If you need the precision you can take the performance hit of such precision being emulated. If you really needed it and the performance you now have options like FPGA too.
If the question is about 128bit registers - well most x86 processors have SSE which are 128 bit registers. Most new x86 processors have AVX which are 256 bit registers. And cutting edge x86 processors such as Knights Landing have 512 bit registers. Instead of these registers holding a single value though they hold multiple values - 4 32 bit floats can be held in a 128 bit register for example. 128-bit architectures can also be used to specify bus sizes - we are seeing increasingly large bus sizes on GPUs and CPUs to gain greater bandwidth. For example nVidias pascal has a 1024 bit memory bus. Also in terms of the original precision question - what if you had for a simulation the choice between using 32 bit floats or 64 bit doubles, but the 32 bit float calculations were say 10 times as fast? Your 32 bit float simulation could run 10 steps of say 1/10 of a timestep for a single 64 bit step. In that scenario (depending on the maths of your simulation) your 32 bit float simulation could be far more accurate, and far more stable. You could also go for 5 steps, and perhaps still be more accurate and stable - and have twice the performance.